APS
has developed a proprietary FCOS packaging solution utilizing
Pillar Bump that has several advantages over the current
packages being used in the market today.
The
key differentiation of APS' technology is the ability to
have much finer pitch bumps, higher I/O density, and lower
cost package than those currently available.
1. |
The
Pillar Bump maintains a High standoff of 60-70um
even at 80um pitch. This allows high I/O density
without sacrificing processability.
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2. |
The
Pillar Bump controlled solder wetting tip allows
“soldermask-less” substrates. This
saves cost and allows substrate makers to go
finer pitch.
|
3. |
APS
has also developed No-flow Underfill material,
called P-Bond TM, that offers low cost and high
throughput solutions for flip chip assembly.
Please refer to the Material – No
Flow Underfill page for more details.
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4.
|
APS
has also developed and patented the Thermal
Compression Bonding (TCB) process with Low CTE
No-flow underfill and Pillar Bump. Please refer
to the TCB page
for more details.
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